#DRAM setup (method=0x10015858) ...
#DRAM0 Window : 0x#1a#1a#1e#22# (13)
#DRAM1 Window : 0x#1e#1e#1c#1c# (14)
#DRAM0 Settings: WD=0x0b0a0a0a RG=0x06060708 RR=0x06060708 RF=0x0b0a0a0b
#DRAM1 Settings: WD=0x0a0b0909 RG=0x07070606 RR=0x07070606 RF=0x0c0a0c0c
#poisoned 131072 pages with 0x5a1bb776
#s*** zxenv has been customized compared to build ***
--- review xmasboot/configs/MeV-REV1.2_SAFE.config for details [xmbcb-ezbootb5-n and_st2] ---
xloadsize=71268
xload rc=6
subrom SHA-256: 43b5383fcd2ecd1f5366bea4eafc03bd740dc0a113af58d02846c117fb581b5b
ezbootb5 @0x00000000 (nand_st2) (actual cpu=@499MHz/dsp=333MHz/sys=333MHz)
on 8655 rev ES5 (subid 0xac) a2=0x00000002 a3=0x00000003
step12
#step22
ruamm0 [0x80000000,0x8f2f0000[ (~254738432 bytes)
ruamm1 [0xcf500000,0xcfd60000[ (~8781824 bytes)
[0xcfd5f000,xos_public_ga=0xcfd5f000[ and [0xcfd5f800,0xcfd60000[ are lost for a lignment)
channel#ei
x_ga=0xcfd5ecd4
[0x8e800000,ios_ga=0x8e800000[ and [0x8eeacfc1,0x8f2f0000[ are lost for alignmen t)
GW32 0x0006f008 0xc0000000 [va=0x84000000]
GW32 0x0006f00c 0xc4000000 [va=0x88000000]
GW32 0x0006f010 0xc8000000 [va=0x8c000000]
step33
xos2k client version=19, server version=19
xos2 SHA-1 = ef2f712148b75194ab1d3c691b55bd4d3a5e956d
xos version = 0x4a
xos serial = fca1430f175528bb0a06a92dec387a55
Using zbootxenv ga=0xcfd4acbc (va=0xbbd4acbc)
**************************************
* SMP86xx zboot start ...
* Version: 3.1.0
* Started at 0xd00f0518.
* Configurations (chip revision: 3):
* Enabled checkpoints.
**************************************
DRAM0 dunit_cfg/delay0_ctrl (0x3514001a/0x4565132b).
DRAM1 dunit_cfg/delay0_ctrl (0x3514001a/0x4565132b).
Using UART port 0 as console.
Board ID.: MeV-REV1.2_SAFE
Setting up H/W from XENV block at 0xbbd4acbc.
Setting <SYSCLK avclk_mux> to 0x17400000.
Setting <SYSCLK hostclk_mux> to 0x00000130.
Setting <IRQ rise edge trigger lo> to 0xff28ca06.
Setting <IRQ fall edge trigger lo> to 0x0000c000.
Setting <IRQ rise edge trigger hi> to 0x0c10001f.
Setting <IRQ fall edge trigger hi> to 0x00000000.
Setting <IRQ GPIO map> to 0x000a0800.
Setting <PB default timing> to 0x03080202.
Keeping <PB timing0> to 0x03080202.
Keeping <PB Use timing0> to 0x000003f3.
Keeping <PB CS Config> to 0x00330003.
Enabled Devices: 0x001b3ef4
PCIHost Ethernet1 IR FIP I2CM I2CS USB PCIDev1 PCIDev2 PCIDev3 PCIDev4 SATA SCARD SCARD1
PCI IRQ routing:
IDSEL 1: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 2: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 3: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 4: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
Smartcard pin assignments:
OFF pin = 2
5V pin = 0
CMD pin = 1
Smartcard1 pin assignments:
OFF pin = 2
5V pin = 0
CMD pin = 1
cd#0 disabled
cd#1 disabled
cd#2 want 96000000Hz: setting of 0x0000000021c00000-2^28
cd#2 cannot measure
cd#3 disabled
cd#4 want 33333333Hz: setting of 0x0000000061333343-2^28
cd#4 measured to 33340kHz
cd#5 disabled
cd#6 disabled
cd#7 disabled
cd#8 disabled
cd#9 disabled
cd#10 disabled
cd#11 disabled
GPIO dir/data = 0x00000880/0x00000880
UART0 GPIO mode/dir/data = 0x6e/0x00/0x00
UART1 GPIO mode/dir/data = 0x6e/0x00/0x00
UART2 GPIO mode/dir/data = 0x00/0x00/0x00
Generate pulse(s) with GPIO7 .. 1,0(16us),1
MAC1: 0e:14:3e:10:05:60
XENV block processing completed.
Default boot index: 0
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 READ[aa df e5 01 ce 5f 20 df 55 ]
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
xmboot booted from devtype: 0, chipsel: 0, phyblocknum: 0, devflags: 0
Explicit boot order specified:
0x00 : devtype=0, CS=0
0x01 : devtype=0, CS=1
ezboot buffers, setup in DRAM bank#1:
Alloting 2097152 bytes for heap.
Alloting 16777216 bytes for reading.
Alloting 16777216 bytes for decryption.
xmat romfs goes to 0xcfb4aca0 (ga)
xmat romfs goes to 0xb7b4aca0 (va)
Trying devtype=0 chipsel=0
xmboot booted from NAND, setting device flags = 0x000b0004
nandlib_init(cs=0, reserved_phyblocks=4, pagesize_shift=11, extecc=0
nand_probe 0x0xd01059e4
nand_Mg_open 0
Reading NAND CS0, addr 0x01800000, size 0x00000800 to 0xb7b4aca0
Not a valid ROMFS
Trying devtype=0 chipsel=1
nandlib_init(cs=1, reserved_phyblocks=4, pagesize_shift=0, extecc=0
nand_probe 0x0xd01059e4
Failed to init!
Failed to find valid xmat romfs in any device / chip select!
freeing xmat romfs buffer at 0xcfb4aca0
xmat romfs process failed.
Trying devtype=0 chipsel=0
xmboot booted from NAND, setting device flags = 0x000b0004
reading z.boot0 (vzx=0xbbd4acbc) is 0x00080000, logical zone
Reading NAND CS0, addr 0x00080000, size 0x00000800 to 0x01840000
Reading NAND CS0, addr 0x00080800, size 0x00030800 to 0x01840800
Found.
ROMFS found at 0x0x01840000, Volume name = YAMON_XLOAD
Found 1 file(s) to be processed in ROMFS.
Processing yamon-xload.zbf (start: 0x01840080, size: 0x00030d14)
Checking zboot file signature .. OK.
Warning: header version mismatched.
*** Fully Encrypted.
src_addr = 0x018400a0, dest addr = 0x02840000
XLOADING src=0xc18400a0, dest=0xc2840000, size=0x00030cf4
xload.c:68: Waiting for XLOAD completion.
xload.c:78: XLOAD done, status = 0x6.
Decompressing to 0x85200000 .. OK (366704/0x59870).
Load time total 0/0 msec.
Execute at 0x85200000 ..
CS 0 vendor id 0xec.......
CS 0 device id 0xf1.......
!!!!! new format Version 1.3.0 !!!!!!
doing Super block Sanity checks... location 4
doing Managment block Sanity checks ...
CS 1 vendor id 0x00.......
CS 1 device id 0x00.......
**********************************
* YAMON ROM Monitor
* Revision 02.13-SIGMADESIGNS-36-R2.13-36
**********************************
Memory: code: 0x86000000-0x86060000, 0x85200000-0x85204000
reserved data: 0x86200000-0x86300000, 0x86700000-0x87000000
PCI memory: 0x86300000-0x86700000
NAND FLASH Driver Version [ S I G M 1.3.0 ] on CS 0
!! No NAND hardware found on CS 1 !!
Environment variable 'start' exists. After 1 seconds
it will be interpreted as a YAMON command and executed.
Press Ctrl-C (or do BREAK) to bypass this.
UART1 WRITE[AA 20 90 10 52 00 45 00 43 00 4F 00 56 00 45 00 52 00 59 00 A3 ]
start of erasing
* Exception : TLB (load or instruction fetch) *
BadVAddr = 0x00000000 Cause = 0x50808008
Compare = 0x00000000 Config = 0x80240483
Config1 = 0xbea3519f Config2 = 0x80000000
Config3 = 0x00000020 Context = 0xc8000000
Count = 0x8d7908ec DEPC = 0x83438404
Debug = 0x8201802a EBase = 0x86000000
EPC = 0x00000000 EntryHi = 0x00000000
EntryLo0 = 0x0300001d EntryLo1 = 0x0340001d
ErrorEPC = 0x28df0244 HWREna = 0x00000000
Index = 0x8000001c IntCtl = 0xf8000000
PRId = 0x0001937c PageMask = 0x1fffe000
Random = 0x00000015 SRSCtl = 0x00000000
SRSMap = 0x00000000 Status = 0x24001c03
Wired = 0x00000000 FCSR = 0x01000000
Hi = 0x00000000 Lo = 0x00000000
f0 :0x0a80cac20248ad04 f16:0x0b4e28a10b4e28a1
f1 :0x828684892c5804d2 f17:0x2440b400b8020a04
f2 :0x3e4a894300a04001 f18:0x028eba20281c0820
f3 :0x64e8008130502822 f19:0x44010a00120c0480
f4 :0x3800e29c321589b2 f20:0x6c8527926a094928
f5 :0x8e08a484000100c8 f21:0x6ac184620800c488
f6 :0x10480091605d6003 f22:0x2a8e2aa1020c3923
f7 :0x20cb34730908a903 f23:0x84e010823a050881
f8 :0xb9d9e090042043a0 f24:0x34004d190802a750
f9 :0xc0009d002024c2a2 f25:0x22689164a80cc080
f10:0x0859082208c42904 f26:0x5637b800240c00d0
f11:0x07d0b8c102049920 f27:0x0004e361ae488971
f12:0x3000bef3280888a1 f28:0x22214b980a12099a
f13:0x66421c0008000850 f29:0x4c6888e022020588
f14:0x210d8bef026ea800 f30:0x28004a988a0c6020
f15:0x102048c020953aa3 f31:0x50c88020a2592024
$ 0(zr):0x00000000 $ 8(t0):0x00000000 $16(s0):0x00000000 $24(t8):0x00000001
$ 1(at):0x00000000 $ 9(t1):0x45779a19 $17(s1):0x00000000 $25(t9):0x66e371d8
$ 2(v0):0x00000000 $10(t2):0xb042b577 $18(s2):0x00000000 $26(k0):0x66e371d8
$ 3(v1):0x00000000 $11(t3):0xa7431b2e $19(s3):0xd010e918 $27(k1):0x860e2010
$ 4(a0):0x860e4fc8 $12(t4):0xdf7dce54 $20(s4):0x00000000 $28(gp):0xd0116f60
#DRAM0 Window : 0x#1a#1a#1e#22# (13)
#DRAM1 Window : 0x#1e#1e#1c#1c# (14)
#DRAM0 Settings: WD=0x0b0a0a0a RG=0x06060708 RR=0x06060708 RF=0x0b0a0a0b
#DRAM1 Settings: WD=0x0a0b0909 RG=0x07070606 RR=0x07070606 RF=0x0c0a0c0c
#poisoned 131072 pages with 0x5a1bb776
#s*** zxenv has been customized compared to build ***
--- review xmasboot/configs/MeV-REV1.2_SAFE.config for details [xmbcb-ezbootb5-n and_st2] ---
xloadsize=71268
xload rc=6
subrom SHA-256: 43b5383fcd2ecd1f5366bea4eafc03bd740dc0a113af58d02846c117fb581b5b
ezbootb5 @0x00000000 (nand_st2) (actual cpu=@499MHz/dsp=333MHz/sys=333MHz)
on 8655 rev ES5 (subid 0xac) a2=0x00000002 a3=0x00000003
step12
#step22
ruamm0 [0x80000000,0x8f2f0000[ (~254738432 bytes)
ruamm1 [0xcf500000,0xcfd60000[ (~8781824 bytes)
[0xcfd5f000,xos_public_ga=0xcfd5f000[ and [0xcfd5f800,0xcfd60000[ are lost for a lignment)
channel#ei
x_ga=0xcfd5ecd4
[0x8e800000,ios_ga=0x8e800000[ and [0x8eeacfc1,0x8f2f0000[ are lost for alignmen t)
GW32 0x0006f008 0xc0000000 [va=0x84000000]
GW32 0x0006f00c 0xc4000000 [va=0x88000000]
GW32 0x0006f010 0xc8000000 [va=0x8c000000]
step33
xos2k client version=19, server version=19
xos2 SHA-1 = ef2f712148b75194ab1d3c691b55bd4d3a5e956d
xos version = 0x4a
xos serial = fca1430f175528bb0a06a92dec387a55
Using zbootxenv ga=0xcfd4acbc (va=0xbbd4acbc)
**************************************
* SMP86xx zboot start ...
* Version: 3.1.0
* Started at 0xd00f0518.
* Configurations (chip revision: 3):
* Enabled checkpoints.
**************************************
DRAM0 dunit_cfg/delay0_ctrl (0x3514001a/0x4565132b).
DRAM1 dunit_cfg/delay0_ctrl (0x3514001a/0x4565132b).
Using UART port 0 as console.
Board ID.: MeV-REV1.2_SAFE
Setting up H/W from XENV block at 0xbbd4acbc.
Setting <SYSCLK avclk_mux> to 0x17400000.
Setting <SYSCLK hostclk_mux> to 0x00000130.
Setting <IRQ rise edge trigger lo> to 0xff28ca06.
Setting <IRQ fall edge trigger lo> to 0x0000c000.
Setting <IRQ rise edge trigger hi> to 0x0c10001f.
Setting <IRQ fall edge trigger hi> to 0x00000000.
Setting <IRQ GPIO map> to 0x000a0800.
Setting <PB default timing> to 0x03080202.
Keeping <PB timing0> to 0x03080202.
Keeping <PB Use timing0> to 0x000003f3.
Keeping <PB CS Config> to 0x00330003.
Enabled Devices: 0x001b3ef4
PCIHost Ethernet1 IR FIP I2CM I2CS USB PCIDev1 PCIDev2 PCIDev3 PCIDev4 SATA SCARD SCARD1
PCI IRQ routing:
IDSEL 1: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 2: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 3: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
IDSEL 4: INTA(#14) INTB(#14) INTC(#14) INTD(#14)
Smartcard pin assignments:
OFF pin = 2
5V pin = 0
CMD pin = 1
Smartcard1 pin assignments:
OFF pin = 2
5V pin = 0
CMD pin = 1
cd#0 disabled
cd#1 disabled
cd#2 want 96000000Hz: setting of 0x0000000021c00000-2^28
cd#2 cannot measure
cd#3 disabled
cd#4 want 33333333Hz: setting of 0x0000000061333343-2^28
cd#4 measured to 33340kHz
cd#5 disabled
cd#6 disabled
cd#7 disabled
cd#8 disabled
cd#9 disabled
cd#10 disabled
cd#11 disabled
GPIO dir/data = 0x00000880/0x00000880
UART0 GPIO mode/dir/data = 0x6e/0x00/0x00
UART1 GPIO mode/dir/data = 0x6e/0x00/0x00
UART2 GPIO mode/dir/data = 0x00/0x00/0x00
Generate pulse(s) with GPIO7 .. 1,0(16us),1
MAC1: 0e:14:3e:10:05:60
XENV block processing completed.
Default boot index: 0
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 READ[aa df e5 01 ce 5f 20 df 55 ]
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
UART1 WRITE ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
xmboot booted from devtype: 0, chipsel: 0, phyblocknum: 0, devflags: 0
Explicit boot order specified:
0x00 : devtype=0, CS=0
0x01 : devtype=0, CS=1
ezboot buffers, setup in DRAM bank#1:
Alloting 2097152 bytes for heap.
Alloting 16777216 bytes for reading.
Alloting 16777216 bytes for decryption.
xmat romfs goes to 0xcfb4aca0 (ga)
xmat romfs goes to 0xb7b4aca0 (va)
Trying devtype=0 chipsel=0
xmboot booted from NAND, setting device flags = 0x000b0004
nandlib_init(cs=0, reserved_phyblocks=4, pagesize_shift=11, extecc=0
nand_probe 0x0xd01059e4
nand_Mg_open 0
Reading NAND CS0, addr 0x01800000, size 0x00000800 to 0xb7b4aca0
Not a valid ROMFS
Trying devtype=0 chipsel=1
nandlib_init(cs=1, reserved_phyblocks=4, pagesize_shift=0, extecc=0
nand_probe 0x0xd01059e4
Failed to init!
Failed to find valid xmat romfs in any device / chip select!
freeing xmat romfs buffer at 0xcfb4aca0
xmat romfs process failed.
Trying devtype=0 chipsel=0
xmboot booted from NAND, setting device flags = 0x000b0004
reading z.boot0 (vzx=0xbbd4acbc) is 0x00080000, logical zone
Reading NAND CS0, addr 0x00080000, size 0x00000800 to 0x01840000
Reading NAND CS0, addr 0x00080800, size 0x00030800 to 0x01840800
Found.
ROMFS found at 0x0x01840000, Volume name = YAMON_XLOAD
Found 1 file(s) to be processed in ROMFS.
Processing yamon-xload.zbf (start: 0x01840080, size: 0x00030d14)
Checking zboot file signature .. OK.
Warning: header version mismatched.
*** Fully Encrypted.
src_addr = 0x018400a0, dest addr = 0x02840000
XLOADING src=0xc18400a0, dest=0xc2840000, size=0x00030cf4
xload.c:68: Waiting for XLOAD completion.
xload.c:78: XLOAD done, status = 0x6.
Decompressing to 0x85200000 .. OK (366704/0x59870).
Load time total 0/0 msec.
Execute at 0x85200000 ..
CS 0 vendor id 0xec.......
CS 0 device id 0xf1.......
!!!!! new format Version 1.3.0 !!!!!!
doing Super block Sanity checks... location 4
doing Managment block Sanity checks ...
CS 1 vendor id 0x00.......
CS 1 device id 0x00.......
**********************************
* YAMON ROM Monitor
* Revision 02.13-SIGMADESIGNS-36-R2.13-36
**********************************
Memory: code: 0x86000000-0x86060000, 0x85200000-0x85204000
reserved data: 0x86200000-0x86300000, 0x86700000-0x87000000
PCI memory: 0x86300000-0x86700000
NAND FLASH Driver Version [ S I G M 1.3.0 ] on CS 0
!! No NAND hardware found on CS 1 !!
Environment variable 'start' exists. After 1 seconds
it will be interpreted as a YAMON command and executed.
Press Ctrl-C (or do BREAK) to bypass this.
UART1 WRITE[AA 20 90 10 52 00 45 00 43 00 4F 00 56 00 45 00 52 00 59 00 A3 ]
start of erasing
* Exception : TLB (load or instruction fetch) *
BadVAddr = 0x00000000 Cause = 0x50808008
Compare = 0x00000000 Config = 0x80240483
Config1 = 0xbea3519f Config2 = 0x80000000
Config3 = 0x00000020 Context = 0xc8000000
Count = 0x8d7908ec DEPC = 0x83438404
Debug = 0x8201802a EBase = 0x86000000
EPC = 0x00000000 EntryHi = 0x00000000
EntryLo0 = 0x0300001d EntryLo1 = 0x0340001d
ErrorEPC = 0x28df0244 HWREna = 0x00000000
Index = 0x8000001c IntCtl = 0xf8000000
PRId = 0x0001937c PageMask = 0x1fffe000
Random = 0x00000015 SRSCtl = 0x00000000
SRSMap = 0x00000000 Status = 0x24001c03
Wired = 0x00000000 FCSR = 0x01000000
Hi = 0x00000000 Lo = 0x00000000
f0 :0x0a80cac20248ad04 f16:0x0b4e28a10b4e28a1
f1 :0x828684892c5804d2 f17:0x2440b400b8020a04
f2 :0x3e4a894300a04001 f18:0x028eba20281c0820
f3 :0x64e8008130502822 f19:0x44010a00120c0480
f4 :0x3800e29c321589b2 f20:0x6c8527926a094928
f5 :0x8e08a484000100c8 f21:0x6ac184620800c488
f6 :0x10480091605d6003 f22:0x2a8e2aa1020c3923
f7 :0x20cb34730908a903 f23:0x84e010823a050881
f8 :0xb9d9e090042043a0 f24:0x34004d190802a750
f9 :0xc0009d002024c2a2 f25:0x22689164a80cc080
f10:0x0859082208c42904 f26:0x5637b800240c00d0
f11:0x07d0b8c102049920 f27:0x0004e361ae488971
f12:0x3000bef3280888a1 f28:0x22214b980a12099a
f13:0x66421c0008000850 f29:0x4c6888e022020588
f14:0x210d8bef026ea800 f30:0x28004a988a0c6020
f15:0x102048c020953aa3 f31:0x50c88020a2592024
$ 0(zr):0x00000000 $ 8(t0):0x00000000 $16(s0):0x00000000 $24(t8):0x00000001
$ 1(at):0x00000000 $ 9(t1):0x45779a19 $17(s1):0x00000000 $25(t9):0x66e371d8
$ 2(v0):0x00000000 $10(t2):0xb042b577 $18(s2):0x00000000 $26(k0):0x66e371d8
$ 3(v1):0x00000000 $11(t3):0xa7431b2e $19(s3):0xd010e918 $27(k1):0x860e2010
$ 4(a0):0x860e4fc8 $12(t4):0xdf7dce54 $20(s4):0x00000000 $28(gp):0xd0116f60